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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
INTORDUCTION
80-TQFP-1212 The S1L9223B02 is a 1-chip BICMOS integrated circuit to perform the function of RF amp and servo signal processor for compact disc player applications. It consist of blocks for RF signal processing, focus, tracking, sled and spindle servo. Also this IC has adjustment free function and embedded OP-AMP for audio post filter.
FEATURES
* * * * * * * * * * * * RF amplifier & RF equalizer Focus error amplifier & servo control Tracking error amplifier & servo control Mirror & defect detector circuit Focus OK detector circuit APC (Auto Laser Power Control) circuit for constant laser power FE bias & focus servo offset adjustment free EF balance & tracking error gain adjustment free Embedded audio post filter The circuit for Interruption countermeasure Double speed play available Operating voltage range: S1L9223B02: 3.4V
ORDERING INFORMATION
Device S1L9223B02-T0R0 Package 80-TQFP-1212 Temperature Range -20 to +70 C
RELATED PRODUCT
* S5L9286F02 Data Processor
1
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
BLOCK DIAGRAM
MDATA
TRCNT
RESET
WDCH
ISTAT
LOCK
58
53
21 29 28 30 37 36
35 34 50 51
57
25 27
26
RFRFO PD1 PD2 FEBIAS F E EI PD LD VR EQC EQO IRF ASY EFM RFI DCB DCC2
72
FRSH
2
ATSC
MCK
FGD
MLT
TE1
TZC
FE1
FE2
FS3
FLB
RF Amp
73 64 65 62
MICOM Data Interface Logic
Focus Phase Compensation & Offset cancel circuit
59 46 47
FDFCT FEFEO
Focus Error Amp FE-BIAS Adjustment
56
TDFCT TETEO TE2 LPFT TG2 TGU SLO SLSL+ SPDLO SPDLSMDP SMON SMEF FSET MIRROR MCP FOK
66 67 78 68 69 70 77 75 74 31 32 76
Tracking Error Amp E/F Balance & Gain Control LDON APC Amp MICOM TO SERVO CONTROL AUTO SEQUENCER
48 Tracking Phase Compensation Block & Jump Pulse GEN. 49 52 54 61 60
Center Voltage Amp.
42
ADJUSTMENT-FREE CONTROL RF Level AGC & Equalizer FS1FS4 TM1- BAL1- PS1- GA1TM6 BAL5 PS4 GA5
Sled Servo Amplifier & Sled Kick GEN.
43 41 45
Spindle Servo LPF ( Double Speed )
44 22 23 24 5
EFM Comparator
1 3
Defect Detection Circuit
4
Mirror Detection Circuit
38 80 39
Built-in Post Filter Amp ( L&R )
FOK Detection Circuit 14 15 12 13 18 16 11 10 8 9
MUTEI
RRC
CH1I
CH2I
GC1I
GC2I
2
GC1O
GC2O
CH1O
CH2O
DCC1
RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
PIN CONFIGURATION
SPDLO
FDFCT
TDFCT
SPDL-
DVDD
ATSC
LPFT
TGU
FEO
TEO
SLO
TZC
FE1
FE2
TE1
TE2
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42
41
SL+
40 39 38 37 36 35 34 33 32 31
TE-
FE-
SL-
TG2 FEBIAS DVEE PD1 PD2 F E PD LD VR VCC RFRFO IRF EQO RFI EQC EI GND MCP
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
SSTOP FOK MIRROR RESET MLT MDATA MCK VSSA EFM ASY ISTAT TRCNT LOCK FGD FS3 FLB SMEF SMON SMDP WDCH
S1L9223B02
30 29 28 27 26 25 24 23 22 21
GC2O
GC1O
DCB FRSH
MUTEI
VREG
CH2O
CH1O
DCC2
DCC1
RRC
VSSP
GC2I
GC1I
CH2I
CH1I
VDDA
VCCP
FSET
ISET
3
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol DCB FRSH DCC2 DCC1 FSET VDDA VCCP GC2I GC2O CH2I CH2O CH1O CH1I GC1O GC1I RRC VSSP MUTEI ISET VREG WDCK SMDP SMON SMEF FLB FS3 FGD LOCK TRCNT ISTAT Description Capacitor connection pin for defect Bottom hold Capacitor connection pin for time constant to generate focus search waveform The input pin through capacitor of defect bottom hold output The output pin of defect bottom hold The peak frequency setting pin for focus, tracking servo and cut off frequency of CLV LPF Analog VCC for servo part VCC for post filter Amplifier negative input pin for gain and low pass filtering of DAC output CH2 Amplifier output pin for gain and low pass filtering of DAC output CH2 The input pin for post filter channel2 The output pin for post filter channel2 The output pin for post filter channel1 The input pin for post filter channel1 Amplifier output pin for gain and low pass filtering of DAC output CH1 Amplifier negative input pin for gain and low pass filtering of DAC output CH1 The pin for noise reduction of post filter bias VSS for post filter The input pin for post filter muting control The input pin for current setting of focus search, track jump and sled kick voltage The output pin of regulator The clock input pin for auto sequence The input pin of CLV control output pin SMDP of DSP The input pin for spindle servo ON through SMON of DSP The input pin of provide for an external LPF time constant Capacitor connection pin to perform rising low bandwidth of focus loop The pin for high frequency gain change of focus loop with internal FS3 switch Reducing high frequency gain with capacitor between FS3 pin Sled runaway prevention pin Track count output pin Internal status output pin
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
PIN DESCRIPTION (Continued)
Pin No. 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 Symbol ASY EFM VSSA MCK MDATA MLT RESET MIRROR FOK SSTOP SL+ SLO SLSPDLSPDLO FEFEO TETEO ATSC TZC TE2 TE1 LPFT DVDD TDFCT FE2 FE1 FDFCT TGU TG2 The input pin for asymmetry control EFM comparator output pin Analog VSS for servo part MICOM clock input pin MICOM data input pin MICOM data latch input pin Reset input pin The mirror output for test The output pin of focus OK comparator The pin for detection whether pick_up position is innermost or not The noninverting input pin of sled servo amplifier The output pin of sled servo amplifier The inverting input pin of sled servo amplifier The noninverting input pin of spindle servo amplifier The output pin of spindle servo amplifier The inverting input pin of focus servo amplifier The output pin of focus servo amplifier The inverting input pin of tracking servo amplifier The output pin of tracking servo amplifier The input pin for Anti-shock detection The comaparator input pin for tracking zero crossing detection Tracking servo input pin Tracking error amplifier output pin The input pin of tracking error low pass filtering signal The power supply pin for logic circuit The capacitor connection pin for tracking defect compensation Focus servo input pin Focus error amplifier output pin The capacitor connection pin for focus defect compensation The capacitor connection pin for high frequency tracking gain switch The pin for high frequency gain change of tracking servo loop with internal TG2 switch Description
5
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
PIN DESCRIPTION (Continued)
Pin No. 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 Symbol FEBIAS DVEE PD1 PD2 F E PD LD VR VCC RFRFO IRF EQO RFI EQC EI GND MCP Focus error bias voltage control pin The DVEE pin for logic circuit The negative input pin of RF I/V amplifier1(A+C signal) The negative input pin of RF I/V amplifier2(B+D signal) The negative input pin of F I/V amplifier (F signal) The negative input pin of E I/V amplifier (E signal) The input pin for APC The output pin for APC The output pin of (AVEE+AVCC)/2 voltage VCC for RF part RF summing amplifier inverting input pin RF summing amplifier output pin The input pin for AGC The output pin for AGC The input pin for EFM comparison The capacitor connection pin for AGC Feedback input pin of E I/V amplifier for EF Balance control GND for RF part Capacitor connection pin for mirror hold Description
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
ABSOLUTE MAXIMUM RATINGS
Characteristic Supply Voltage Power Dissipation Operating Temperature Storage temperature Symbol VMAX PD TOPR TSTG Value 6 150 -20 to + 70 -55 to + 150 Unit V mW
o o
C C
ELECTRICAL CHARACTERISTICS
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Supply Current High Supply Current Typ RF Amp Offset Voltage RF Amp Voltage Gain RF THD Symbol ICCHI ICCTY Vrfo Grf Rfthd Test Conditions VCC = 3.6V, No load VCC = 3.2V, No Load Input open SG3 f = 10kHz, 40mVp-p, sine SG3 f =1kHz, 40mVp-p,sine SG3 DC 1.8V SG3 DC 1.4V Input open input open WDCH=88.2kHz Pulse, $841 SG3 f=10kHz, 32mVp-p, sine SG3 f = 10kHz, 32mVp-p, sine Gfe1-Gfe1 SG3 DC 2.7V SG3 DC2.3V $878+$87F+$840 Pin 30 pin 58 pin 73 Output - - Min. 12 8 -80 25.1 - 2.8 - 0 -450 -35 27 27 -3 2.7 - 2.7 Typ. 27 23 0 28.1 - - - 50 -250 0 30 30 0 - - Max. 42 38 +80 31.1 5 - 0.6 100 -50 35 33 33 +3 - 0.6 Unit mA mA mV dB % V V mV mV mV dB dB dB V V V
RF Amp Max. Output Voltage Vrfpp1 RF Amp Min. Output Voltage Vrfpp2 RF oscillation voltage Focus Error Amp Offset Voltage Focus Error Amp Auto Offset Voltage Focus Error Amp PD1 Voltage Gain Focus Error Amp PD2 Voltage Gain Focus Error Amp Voltage Difference Focus Error Amp Max. Output Voltage Focus Error Amp Min. Output Voltage ISTAT output status Rfosc1 Vfeo1 Vfeo2 Gfe1 Gfe2 Gfe Gfepp1 Gfepp2 Vistat1
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S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic AGC Max Gain AGC EQ Gain AGC Gain2 AGC Compress Ratio AGC Frequency Symbol Gagc Geq Gagc2 Cagc Fagc Test Conditions SG4 f = 500kHz, 20mVp-p, sine Gain Difference of Gagc at f =1.5MHz SG4 f = 500kHz, 0.5Vp-p, sine Gain Difference of Gagc2 at 0.1Vp-p Gain Difference SG4 f=1.5MHz,0.1Vp-p,sine and f=500kHz,0.1Vp-p,sine Pin 74 IRF = 1.6V $800, $830, input open $800, $820 SG3 0.3Vp-p, 10kHz, sine SG3 0.3Vp-p, 40kHz, sine Gtef-Gtee DG3 DC 2.7V SG3 DC 0.5V $800,820 SG3 0.3Vp-p, 10kHz, sine $800, 820 SG3 0.3Vp-p, 10kHz, sine SG3 0.3Vp-p, 1kHz, sine, $830 SG3 0.3Vp-p, 1kHz, sine, $831 SG3 0.3Vp-p,1kHz, sine, $832 SG3 0.3Vp-p, 1kHz, sine, $833 SG3 0.3Vp-p, 1kHz, sine, $834 pin 75 Output Min. 16 0 3.5 0 -1.5 Typ. 19 1 6 2.5 0 Max. 22 2 9 5 2.5 Unit dB dB dB dB dB
RF& AGC oscillation voltage2 Tracking Error Amp Voltage Gain F Tracking Error Amp Voltage Gain E Tracking Error Amp Voltage Gain Difference Tracking Error Amp Maximum Output Voltage H Tracking Error Amp Minimum Output Voltage L Tracking Error Amp Gain up F Tracking Error Amp Gain up E Tracking Gain Normal Tracking F Gain 1 Tracking F Gain 2 Tracking F Gain 3 Tracking F Gain 4
Rfosc2
0 -50 2.1 -0.75 -0.25 2.2 - 8.0 pin 53 5.3 2.1 0.1 -1.7 -5.0 -9.2
25 0 5.1 2.25 2.75 - - 11.0 8.3 5.1 3.1 1.3 -2.0 -6.2
50 +50 8.1 5.25 5.75 - 1.2 14.0 11.3 8.1 6.1 4.3 1.0 -3.2
mV mV dB dB dB V V dB dB dB dB dB dB dB
Tracking Error Offset Voltage Vteo Gtef Gtee Gte Vtepp1 Vtepp2 Tguf Tgue Fgfn Fgf1 Fgf2 Fgf3 Fgf4
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Tracking E Balance Normal Tracking E Balance 1 Tracking E Balance 2 Tracking E Balance 3 Tracking E Balance 4 Tracking E Balance 5 FGFN-FGF1 FGFN-FGF2 FGFN-FGF3 FGFN-FGF4 TBE5 - TBE4 TBE4 - TBE3 TBE3 - TBE2 TBE2 - TBE1 APC PSUB Voltage 1 APC PSUB Voltage 2 APC NSUB Voltage 1 APC NSUB Voltage 2 APC LD Off Voltage 1 APC LD Off Voltage 2 APC Maximum Output Current H APC Minimum Output Current L Symbol Tben Tbe1 Tbe2 Tbe3 Tbe4 Tbe5 FG1 FG2 FG3 FG4 TB1 TB2 TB3 TB4 Vapc1 Vapc2 Vapc3 Vapc4 Vapc5 Vapc6 Vapc7 Vapc8 Test Conditions SG3 0.3Vp-p, 1kHz, sine, $800 SG3 0.3Vp-p, 1kHz, sine, $801 SG3 0.3Vp-p, 1kHz, sine, $802 SG3 0.3Vp-p, 1kHz, sine, $804 SG3 0.3Vp-p, 1kHz, sine, $808 SG3 0.3Vp-p, 1kHz, sine, $810 - - - - - - - - LDON, $854, SG4 GND+85mV LDON, $854, SG4 GND+185mV LDON, $850, SG4 GND+95mV LDON, $850, SG4 GND+165mV LDOFF, $85C, SG4 1.6V LDOFF, $858, SG4 2.5V LDON, $854, SG4 GND + 185mV LDON, $854, SG4 GND + 85mV pin 69 - - - - - - - - Output Min. -0.27 -0.51 -0.74 pin 53 0.17 1.03 2.63 0 0.5 2.0 3.0 0.6 -0.14 -0.57 -0.77 - 2.5 2.5 - 2.6 - 1.6 - Typ. 2.27 2.51 2.74 3.17 4.03 5.63 1.5 2.0 3.25 4.25 1.6 0.86 0.43 0.23 - - - - - - - - Max. 5.27 5.51 5.74 6.17 7.03 8.63 3 3.5 4.5 5.5 2.6 1.86 1.43 1.23 1.2 - - 1.2 - 1.1 - 1.6 Unit dB dB dB dB dB dB dB dB dB dB dB dB dB dB V V V V V V V V
9
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Mirror Maximum Output Voltage H Mirror Minimum Output Voltage L Mirror Minimum Operating Frequency Mirror Maximum Operating Frequency Mirror AM Frequency Characterstic Mirror Minimum Input Voltage Mirror Maximum Input Voltage FOK Threshold Voltage FOK Output Voltage H FOK Output Voltage L Defect Output Voltage H Symbol Vmirh Vmirl Fmirh Fmirb Fmir Vmir Vmih Vfokt Vfokh Vfokl Vdfcth Test Conditions SG4 1.2V+0.8Vp-p, 1kHz,sine SG4 1.2V+0.8Vp-p, 1kHz,sine SG4 1.2V + 0.8Vp-p, 900Hz,sine SG4 1.2V+0.8Vp-p, 30kHz,sine SG4 1.2V+0.8Vp-p, 600Hz, fc=600kHz 55% modulation SG4 1.2V + 0.2Vp-p, 10kHz,sine SG4 1.2V+1.8Vp-p, 10kHz,sine SG4 1.35V - 1.1V, DCsweep, 5mV step SG4 DC 1.0V SG4 DC 1.6V $863,SG3 1.615V+0.032Vp-p f = 1kHz,sine $863,SG3 1.615V+0.032Vp-p f = 1kHz,sine SG2 1.6V+0.1Vp-p 1kHz,sine SG2 1.6V+0.1Vp-p 1kHz,sine No input $854 SG2 1.6V+0.1Vp-p 1kHz,sine $857 SG2 1.6V+0.1Vp-p 1kHz,sine $855 SG2 1.6V+0.1Vp-p 1kHz,sine pin 49 -100 -100 0 0 100 100 mV mV pin 39 pin 38 Output Min. 2.7 - - 30 - 1.8 -420 2.7 - 2.7 Typ. - - 550 75 400 0.1 - -360 - - - Max. - 0.5 900 - 600 0.2 - -300 - 0.5 - Unit V V Hz kHz Hz V V mV V V V
Defect Output Voltage L
Vdfcth
pin 40
-
-
0.5
V
Focus Loop Mute Tracking Loop Mute Loop mute offset voltage Interruption Interruption on 1 Interruption on 2
Fmute Tmute Vteo1 Imute Imute1 Imute2
pin 47
-100 -100 -100 -100
0 0 0 0
100 120 100 120
mV mV mV mV
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Defect Bottom Voltage Defect Max Freq. Voltage Defect Minimum Input Voltage Defect Maximum Input Voltage EFM Duty Voltage 1 EFM Duty Voltage 2 EFM Minimum input Voltage Symbol Fdfct1 Fdfct2 Vdfct1 Vdfct2 Defm1 Defm2 Vefm1 Test Conditions SG3 1.620V+0.04Vp-p, 1kHz,sine SG3 1.620V+0.04Vp-p, 2kHz,sine SG 3 1.610V+0.020Vp-p, 1kHz,sine SG3 1.635V+0.070Vp-p, 1kHz,sine SG4 1.6V+0.75Vp-p, 750kHz,sine SG4 1.85V+0.75Vp-p, 750kHz,sine SG4 1.6V+0.12Vp-p, 750kHz,sine SG4 1.2V+1.8Vp-p 750kHz,sine SG4 1.6V+0.75Vp-p 4MHz sine Output Min. - 2.0 pin 40 - 1.8 -50 pin 31 0 - 1.8 pin 32 4 45 35 pin 30 pin 33 -67 7 -30 pin 30 -100 200 pin 29 Typ. 670 4.7 0.3 - 0 50 - - - 50 69 -37 37 0 -50 250 Max. 1000 - 0.5 - 50 100 0.12 - - 55 100 -7 67 30 -30 300 Unit Hz kHz V V mV mV V V MHz % mV mV mV mV mV mV
EFM Maximum input Voltage Vefm2 EFM Maximum Operating Frequency EFM duty check FZC Threshold Voltage ATSC Threshold Voltage 1 ATSC Threshold Voltage 2 TZC Threshold Voltage SSTOP Threshold Voltage Tracking gain window voltage Tracking gain window range Fefm
EFMduty SG4 1.6V+0.75Vp-p 750kHz sine Vfzc Vatsc1 Vatsc2 Vtzc Vsstop VtGW DC 1.6V+34mV,100mV $10,SG2 DC 1.6V-6mV -67mV SG2 DC 1.6V+6mV,+67mV $20,SG2 DC 1.6V-30mV +30mV $30,SG2 DC 1.6V-100mV -30mV $840+$830 SG2 1.6V+ 199mV, 300mV DC sweep 5mV step $848+$830 SG2 1.6V+ 99mV, 200mV DC sweep 5mV step
VTGW2
100
150
200
mV
11
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Tracking balance window voltage Tracking balance window range Center Voltage VREF Current Drive Voltage 1 VREF Current Drive Voltage 2 Post CH1 Freq. Characteristic Post CH2 Freq. Characteristic Post CH1 Mute Post CH2 Mute Post CH1 offset Post CH2 offset Post CH1 Gain Post CH2 Gain Focus Loop DC Gain Focus Off Offset Focus On Offset Focus Auto Offset ISTAT status after focus offset adjustment Symbol VTBW Test Conditions $844+$810 SG2 1.6V + 99mV, -25mV 5mV DC sweep $844+$810 SG2 1.6V + 99mV, -25mV 5mV DC sweep 1.6V Reference 1.6V Reference 1.6V Reference SG1 1.6V+1Vp-p 40kHz,sine SG1 1.6V+1Vp-p 40kHz,sine Mute=3.2V SG1 1.6V+1Vp-p,1kHz,sine Mute=3.2V SG1 1.6V+1Vp-p,1kHz,sine Mute=0V Mute=0V Mute=0V, 1.6V+1Vp-p, 20kHz sine Mute=0V, 1.6V+1Vp-p, 20kHz sine $08, SG2 DC 1.7V, 1.5V average $00 $08,DC 1.5V $842, WDCK, after 100ms $86F+842 pin 70 pin 70 pin 70 pin 12 pin 11 pin12 pin 11 pin 12 pin 11 pin 12 pin 11 pin 47 pin 47 pin 47 pin 47 pin 30 Output pin 30 Min. -25 Typ. 15 Max. 55 Unit mV
VTBW2
-25
15
55
mV
VCVO VCVO1 VCVO2 Fpos1 Fpos2 Mute1 Mute2 Vpos1 Vpos2 Gpos1 Gpos2 Gf Vosf1 Vofs2 Vaof Vistat2
-100 -100 -100 -4.5 -4.5 - - -50 -50 -1.5 -1.5 19.0 -100 0 -65 2.7
0 0 0 -3.0 -3.0 - - 0 0 0 0 21.5 0 250 0 -
100 100 100 -1.5 -1.5 -35 -35 50 50 1.5 1.5 24.0 100 500 65 -
mV mV mV dB dB dB dB mV mV dB dB dB mV mV mV V
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V Characteristic FE bias voltage after focus offset adjustment Focus Output Voltage H Focus Output Voltage L Focus Oscillation Voltage Focus Feed Through Focus AC Gain 1 Focus AC Phase 1 Focus AC Gain 2 Focus AC Phase 2 Focus Search Voltage1 Focus Search Voltage2 Focus Loop Total Gain Tracking DC Gain Tracking Off Offset Tracking On Offset Tracking Oscillation Voltage Symbol Vteo3 Vfoh1 Vfol1 Vosc Gff Gfa1 Pfa1 Gfa2 Pfa2 Vfs1 Vfs2 Gftg Gto Vost1 Vost2 Vosa1 Test Conditions after focus offset adjustment $08, DC 2.1V $08, DC 1.1V $08, DC 1.6V Gain Difference at Servo on and off $08, SG2 1.6V+0.1Vp-p 1.2kHz,sine $08, SG2 1.6V + 0.1Vp-p 1.2kHz,sine $08, SG2 1.6V + 0.1Vp-p 2.7kHz,sine $08, SG2 1.6V+0.1Vp-p 2.7kHz,sine $30+$02 $30+$03 Focus PD gain + Focus loop DC gain $25 SG2 DC 1.4V, 1.8V average gain $20 SG2, DC 1.6V, $25 $25, SG2 DC 1.6V 1.6V + 0.1Vp-p, 1kHz, sine 1.6V + 0.1Vp-p,1kHz,sine $25,SG2 DC 0.6V $25, SG2 , DC 2.6V $2C $28 $28 + 877 $2C + 877 Output pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 47 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 pin 49 Min. -50 2.8 - 0 - 19.0 40 14.0 40 -0.65 0.35 49.5 13.5 -100 -100 0 17.5 17.5 2.8 - -0.65 0.35 0.35 -0.65 Typ. 0 - - 100 - 23.0 65 18.5 65 -0.50 0.50 51.5 15.5 0 0 100 20.5 20.5 - - -0.5 0.5 0.5 -0.5 Max. 50 - 0.60 200 -35 27.0 90 23.0 90 -0.35 0.65 53.5 17.5 100 120 200 23.5 23.5 - 0.6 -0.35 0.65 0.65 -0.35 Unit mV V V mV dB dB deg dB deg V V dB dB mV mV mV dB dB V V V V V V
Tracking gain boost for ATSC Gatsc Tracking gain boost on LOCK (L) Tracking Output Voltage H Tracking Output Voltage L Tracking Jump Voltage 1 Tracking Jump Voltage 2 Direct 1 track jump 1 Direct 1 track jump 2 Glock Vth1 Vtl1 Vtj1 Vtj2 Vdir1 Vdir2
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S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Tracking Feed Through Tracking AC Gain 1 Tracking AC Phase 1 Tracking AC Gain 2 Tracking AC Phase 2 Tracking Loop Gain Sled DC Gain Sled Feed Through Symbol Gtf Gta1 Pta1 Gta2 Pta2 Gtrt Gsl Gslf Test Conditions Gain Difference at Tracking servo on and off $10,$25,SG2 1.6V + 0.1Vp-p, 1.2kHz,sine $10, $25, SG2 1.6V+ 0.1Vp-p, 1.2kHz,sine $10, $25, SG2 1.6V+ 0.1Vp-p, 2.7kHz, sine $10,$25,SG2 1.6V + 0.1Vp-p, 2.7kHz,sine tracking Amp F gain+ servo DC gain SG2 DC 1.8V, 1.4V Gain Difference at sled servo on and off SG2 1.6V + 0.1Vp-p 1.2kHz,sine $25, SG2 DC 2.0V $25, SG2 DC 1.2V $22 $23 $F0 SG1 DC 1.7V, 1.5V, average gain $F3 SG1 DC 1.7V, 1.5V, average gain $F0, SG1 DC 2.5V $F0, SG1 DC 0.7V $F0,SG1 1.6V + 0.2Vp-p, 2kHz,sine $F0,SG1 1.6V + 0.2Vp-p, 2kHz,sine Output pin 49 pin 49 pin 49 pin 49 pin 49 pin 42 pin 42 Min. - 9.0 -140 17.5 -195 18.5 20.5 - Typ. - 12.5 -115 21.5 -150 20.5 22.5 - Max. -39 16.0 -90 25.5 -100 22.5 24.5 -34 Unit dB dB deg dB deg dB dB dB
Sled Output Voltage H Sled Output Voltage L Sled Forward Kick Voltage Sled Reverse Kick Voltage Spindle Normal Speed Gain
Vslh1 Vsll1 Vsk1 Vsk2 Gsp
pin 42 pin 42 pin 42 pin 42 pin 45
2.8 - 0.38 -0.75 14.0
- - 0.60 -0.6 16.5
- 0.6 0.75 -0.38 19.0
V V V V dB
Spindle Double Speed Gain
Gsp2
pin 45
19.0
23.0
27.0
dB
Spindle Output Voltage H Spindle Output Voltage L Spindle AC Gain Spindle AC Phase
Gsph1 Gspl1 Gspa Pspa
pin 45 pin 45 pin 45 pin 45
2.8 - -7.0 -120
- - -3.5 -90
- 0.6 0 -60
V V dB deg
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Post filter output voltage mix.1L Post filter output voltage mix. 2L Total harmonic distortion 1L Total harmonic distortion 1L Total harmonic distortion 1L Total harmonic distortion 1L Total harmonic distortion 1L Total harmonic distortion 2L Total harmonic distortion 2L Total harmonic distortion 2L Total harmonic distortion 2L Total harmonic distortion 2L Frequency Characteristics 1L Frequency Characteristics 1L Frequency Characteristics 1L Frequency Characteristics 1L Frequency Characteristics 1L Frequency Characteristics 2L Frequency Characteristics 2L Frequency Characteristics 2L Frequency Characteristics 2L Frequency Characteristics 2L Symbol Vpom1L Vpom2L THD11L THD12L THD13L THD14L THD15L THD21L THD22L THD23L THD24L THD25L fv11L fv12L fv13L fv14L fv15L fv21L fv22L fv23L fv24L fv25L Test Conditions SG1 1.6V + 1.5Vp-p, 1kHz, within THD 1% SG1 1.6V + 1.5Vp-p, 1kHz, within THD 1% SG1 f = 100Hz, 0dBm SG1 f=1kHz,0dBm SG1 f = 10kHz, 0dBm SG1 f = 16kHz, 0dBm SG1 f = 20kHz, 0dBm SG1 f = 100Hz, 0dBm SG1 f = 1kHz, 0dBm SG1 f = 10kHz, 0dBm SG1 f = 16kHz, 0dBm SG1 f = 20kHz, 0dBm SG1 f = 100Hz, 0dBm SG1 f = 1kHz, 0dBm SG1 f = 10kHz, 0dBm SG1 f = 16kHz, 0dBm SG1 f = 20kHz, 0dBm SG1 f = 100Hz, 0dBm SG1 f = 1kHz, 0dBm SG1 f = 10kHz, 0dBm SG1 f = 16kHz, 0dBm SG1 f = 20kHz, 0dBm Output pin 12 pin 11 pin 12 pin 12 pin 12 pin 12 pin 12 pin 11 pin 11 pin 11 pin 11 pin 11 pin 12 pin 12 pin 12 pin 12 pin 12 pin 11 pin 11 pin 11 pin 11 pin 11 Min. 0.5 0.5 - - - - - - - - - - -0.1 -0.25 -0.5 -1.0 -1.5 -0.1 -0.25 -0.5 -1.0 -1.5 Typ. 0.55 0.55 0.01 0.01 0.05 0.1 0.1 0.01 0.01 0.05 0.1 0.1 0 0 0 0 0 0 0 0 0 0 Max. - - 0.05 0.05 0.1 0.2 0.2 0.05 0.05 0.1 0.2 0.2 0.1 +0.25 0.5 1.0 1.5 0.1 +0.25 0.5 1.0 1.5 Unit Vrms Vrms % % % % % % % % % % dB dB dB dB dB dB dB dB dB dB
15
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
ELECTRICAL CHARACTERISTICS (Continued)
(Ta = 25C, VDD = DVDD = VCC = +3.2V, VSS = DVSS = GND = VSSP = 0V) Characteristic Cross talk 1L Cross talk 1L Cross talk 1L Cross talk 2L Cross talk 2L Cross talk 2L Signal to noise ratio 1L Signal to noise ratio 2L Channel balance L Symbol CT11L CT12L CT13L CT21L CT22L CT23L S/N1L S/N2L CBL Test Conditions SG1 100Hz, 0dBm, ratio on Ch2 SG1 1kHz, 0dBm, ratio on Ch2 SG1 10kHz, 0dBm, ratio on Ch2 SG1 100Hz,0dBm,ratio on Ch1 SG1 1kHz,0dBm,ratio on Ch1 SG1 10kHz,0dBm, ratio on Ch1 DC 2.5V 0dbm, ratio on Noise DC 2.5V 0dbm, ratio on Noise Gain Difference Ch1 and Ch2 Output pin 12 pin 12 pin 12 pin 11 pin 11 pin 11 pin 12 pin 11 Min. 67 62 57 67 62 57 67 67 -0.1 Typ. 80 75 65 80 75 65 80 80 0 Max. - - - - - - - - +0.1 Unit dB dB dB dB dB dB dB dB dB
NOTE: The notation $ means hexa decimal of MICOM command, and Low voltage test items only refer to S1L9223B02-L
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
TEST CIRCUIT
17
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
FUNCTIONAL DESCRIPTION RF AMP BLOCK
RF AMPLIFIER The optical currents input through pins PD1(A+C) and PD2(B+D) are converted into voltages through I-V amp, and they are added to RF summing amp. The voltage, converted from the photo diode (A+B+C+D) signal, is output through RFO (pin74) and the eye pattern can be checked at this pin.
58K PD1 64
+ VC
VA I-V amp(1)
10K
73 + VC RF summing amp
RFO
58K PD2 65
+ VC
VB I-V amp(2)
10K 72
RF-
Figure 1. RF Amplifier Circuit FOCUS ERROR AMP The output of the focus error amp is the difference between I-V amp(1) output VA and RF I-V amp(2) output VB. The focus error bias voltage applied to the (+) of focus error amp can be changed by output voltage of D/A converter as shown in diagram, so that the offset of focus error amp can be adjusted automatically by controlling 5 bits counter switches. Focus error bias can be adjusted from the range of +100mV -- -100mV by connecting the resistor on pin 63 (FEBIAS).
18
RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
164K VB > VA > sev-stopb FEBIAS 62 sev-stop <5 Bit Counter> 3K
X1 X2 X4 X8 X16
32K 32K
58 + 160K
FE1
SW1
4K
+ FEBIAS vc fe-stopb
fcmpo
+
1. 2.
VA and VB refer to output signal of PD1 and PD2 I/V amp. sev-stopb,sev-stop,fe-stopb and fcmpo are internal signals
Figure 2. Focus Error Amplifier Circuit TRACKING ERROR AMP The optical currents detected from the side photo diode (E and F) pf pick-up are input to the E and F pin and converted into voltage signals by E I-V and F I-V amp. The output of tracking error amp generates the difference between E I-V AMP and F I-V AMP voltage output. The E-F balance can be adjusted by modifying the gain of E I-V AMP, and the tracking gain can be adjusted automatically by controlling the peak voltage at pin TE2 by MICOM program.
TE2 TE1
53
52
54
LPFT
F
66 67
I-V AMP I-V AMP
-
+
Balance Window Comp
30
ISTAT
E
13K
16K
7.5K
220K
110K
56K
27K
BAL < 4 : 0 >
75K
GAIN_UP/DOWN GAIN < 3 : 0 >
Figure 3. Tracking Error Amplifier Circuit
13K
1.5K
78
3.3K
EI
Gain Window Com
29
TRCNT
19
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
FOCUS OK CIRCUIT The FOK is the output. The focus OK circuit generates a timing window to enable focus servo operation from focus search status. When the difference of the RFO (pin74) signal and DC coupled signal IRF (pin75) are above the predefined voltage the Focus OK circuit output (pin40) becomes active (High output). The predefined voltage is 0.39V
40K 40K RFO IRF 73 74 40K
+
57K
39 90K +
FOK
VC+0.625V
Figure 4. Focus OK Circuit MIRROR CIRCUIT IRF signal is amplified by the mirror amp, and the peak and bottom component of amplified signal are detected by peak and bottom hold circuit. The peak hold circuit covers traverse signal of up to 100KHz component and bottom hold circuit capable of covering the envelope frequency of disc rotation. The time constant for the mirror hold must be sufficiently larger than that of the traverse signal.
38K IRF 74 17K 2.5K Peak and Bottom Hold + 17K
1.5K 80 MCP
+
+ 96K
19K
+ 38 MIRROR
-
Figure 5. Mirror Circuit
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
EFM COMPARATOR The EFM comparator converts a RF signal into a binary signal. Because the asymmetry generated due to variations in disc manufacturing can not be eliminated by the AC coupling alone, this circuit uses to control reference voltage of EFM comparator for eliminating asymmetry.
40K RFI 76 + 32 EFM
100K + 19K + 20K 31 ASY
100K
85K
Figure 6. EFM Comparator & Asymmetry Circuit DEFECT CIRCUIT The RFO signal bottom, after being inverted, is held with two time constants of long and short. The short time-constant bottom hold is done for a disc mirror defect more than 0.1msec, the long time-constant bottom hold is done with the mirror level prior to the defect. By differentiating this with a capacitor coupling and shifting the level, both signals are compared to generate the mirror defect detection signal.
DCC1 4 3
DCC2
75K
RFO
73
37.5K 28K
+
BOTTOM HOLD
75K BOTTOM VC+0.6254V HOLD 43K +
-
DFCT 40
SSTOP/DFCT
1 DCB
Figure 7. Defect Circuit
21
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
APC (AUTO POWER CONTROL) CIRCUIT The laser diode has large negative temperature characteristic in its optical output when driven with a constant current on laser diode. Therefore, the output on processing monitor photo diode, must be a controlled current for getting regular output power, thus the APC (Auto Power Control) circuit is composed.
PN (From MICOM command) PD 68 43.5K + 150K +
0.75K 69 LD
150K
150K
300K
1.25V
5.5K
LDON (From MICOM command)
Figure 8. APC Circuit AGC STABILITY CIRCUIT The AGC block is the function used to maintain the constant level of RF peak to peak voltage. After the operation of RF envelop detection and comparing with reference voltage, RFO level is kept stable in 1Vp-p, and input to EFM Slice.
IRF
74
VCA
EQUALIZE
77
EQC
75 EQO
Figure 9. AGC Block
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
POST FILTER The adjustment of audio output gain and the integration of possible de-emphasis output are executed by this circuit. This block has amps of 2 channel for gain and filter setting and mute pin for audio signal muting.
CH2I VCC
+ 11 CH2O
25K
GC2I
+ 9
+ GC1I 25K
GC2O
+
14 GC1O
+
CH1I
-
12 CH1O
18 MUTEI
Figure 10. Post Filter Circuit CENTER VOLTAGE GENERATION CIRCUIT The center voltage is generated by voltage divide using resistor.
VCC
30K
70 VR +
30K
Figure 11. Center Voltage Generation Circuit
23
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
SERVO BLOCK
FOCUS SERVO BLOCK When defect is "H" (the defect signal is detected), the focus servo loop is muting in case of focus phase compensation. At this time, the focus error signal is output through the low pass filter formed by connecting a capacitor (0.1F) and a built-in 470K resistor to the FDFCT pin (pin 60). Accordingly, the focus error output is held at the error value just before defect error during defect occurring. The peak frequency of focus loop phase compensation is at about 1.2KHz when the resistor connected to FSET pin (pin 6) is 510K, and it is inversely proportional to the resistor connected to the FSET pin. While the focus search is operating, the FS4 switch is on and then the focus error signal is isolated, accordingly the focus search signal is output by FEO pin (pin 48). When the FS2 switch is on (focus on), the focus servo loop is on and the focus error signal from FE2 pin (pin 58) is output through the focus servo loop.
3.6K 60K
VC
+
FSCMPO
+
FZCI
+
48K
47
FEO
FE2
57
470K
20K
Focus Phase Compensation
92K
X4
X3
X2
X1
FDFCT
59
FS4B 130K FS2B
40K
+
FE-
46
DFCTI 470K FGD 40K 10K 50K 3.6K PS 4 FS1 46K 580K FS3 X1 X2 X3 X4 0 0 1 1 3 0 1 0 1
27
FS3
26 +
25
FLB
5
FSET
2
FRCH
Figure 12. Focus Servo Block
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
TRACKING SERVO BLOCK During detection of defect, the tracking error signal is output through the tracking servo loop after passing the low pass filter formed by connecting a capacitor (0.1F) and a built-in 470K resistor to the TDFCT pin (pin57) in case of tracking phase compensation. The value of tracking gain up/down can be controlled by TGU and TG2 pin. The peak frequency of tracking loop phase compensation, the dynamic range and offset of OP AMP can be adjusted by changing the value of resistor connected to FSET pin same as focus loop. In case of unstable status of actuator after jumping, the ON/OFF of tracking loop is controlled by TM7 switch of break circuit. After 10-track jumping, servo circuit gets out of the liner range and actuator's tracking becomes occasionally unstable. Hence unnecessary jumping with many tracking error should be prevented.
TE2 52 470K 56 TDFCT DFCTI 680K TG1 10K 66PF TM1 TGU 60 TG2 61 TG2 470K 20K 82K 110K
TRACKING PHASE COMPENSATION
TM4
680K TG1
48 TM3
TE-
10K
90K
49 +
TEO
TM7
5 FSET
Figure 13. Tracking Servo Block
25
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
SLED SERVO BLOCK The moving of pick-up is controlled by tracking servo output through a low pass filter. The sled kick voltage is output for track jump operation.
SLO TM6 42
TM7
PS 4 X1 X2 X3 X4 0 0 1 1 3 0 1 0 1
+
SL43 SL+ 41
TM2
Figure 14. Sled Servo Block SPINDLE SERVO BLOCK The 20K resistor and 0.33uF capacitor form the 200Hz low pass filter, and the carrier component of spindle servo error signals is eliminated. In CLV-S mode, SMEF becomes "L" and pin 25 low pass filter fc lowers, strengthening the filter further. The characteristics of high frequency phase compensation in focus tracking servo and the characteristics of cut off frequency in CLV low pass filter are tested by FSET pin.
SMON 23
22K
22K
220K 15K 220K SMDP 22 20K 220K 15K 220K
+
100K
+
50K Double speed
45
SPDLO
44 SPDL-
24 SMEF
5 FSET
Figure 15. Spindle Servo Block
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
DIGITAL BLOCK
DESCRIPTION Digital block is transferred serial data by MICOM and 8-bit serial data is converted to parallel data by serial to parallel register. This data is decoded by latch signal. The status output of focus servo, tracking servo and sled servo system,etc. It is determined by each data. The auto-sequence function process 2 -- 4 MICOM command by one auto-sequence command.
MDATA
D0
D1
D2
D3
D4
D5
D6
D7
twck twck MCK
tsu tsn
MLT
td twl
Figure 16. CPU Serial Interface Timing Chart
Item Clock Frequency Clock Pulse Width Hold Time Setup Time Delay Time Latch Pulse Width fck
Symbol
Min - 500 500 500 500 1000
Typ - - - - - -
Max 1 - - - - -
Unit MHz ns ns ns ns ns
fwck tsu tn td twl
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S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
MICOM COMMAND SET Item Hexa D7 Focus Control Tracking Control Tracking Mode Select $0X $1X $2X $3X 0 0 0 0 Address D6 0 0 0 0 D5 0 0 1 1 D4 0 1 0 1 D3 FS4 Focus On Anti Shock D2 FS3 Gain Down Brake On Data D1 FS2 Search On TG2 Gain Set D0 FS1 Search Up TG1 Gain Set FZC A.S TZC STOP ISTAT Out
Tracking Mode PS4 Focus Search+2 AS3 0.18ms PS3 Focus Search+2 AS2 0.09ms 0.18ms 5.80ms 32 64
Sled Mode PS2 PS1 Sled Kick+2 Sled Kick+1 AS1 0.045ms 0.09ms 0.09ms 16 32 AS0 0.022ms 0.045ms 0.045ms 8 16
Auto Sequence R Blind/ A overflow M Break S E T Kick 2N jump move (M) Auto Adj. Speed
$4X
0
1
0
0
/BUSY
$5X $6X
0 0
1 1
0 1
1 0.36ms 0 11.6ms 64
Hi-Z
$7X
0
1
1
1
128
$8XX $FX
1 1
0 1
0 1
0 1
Offset, Balance, Gain, APC Control $F0: Normal Speed $F3: Double Speed
- -
Focus Control ($0X) This command consists of 8 bits data and expressed by two hexa $0X. D7 0 D6 0 D5 0 D4 0 D3 FS4 D2 FS3 D1 FS2 D0 FS1 ISTAT FZC
FS4, FS3, FS2, FS1: internal switch for focus control * Focus Search Operation (FS2,FS1) $02: FS2 switch become off and the value of servo output pin is as below. (10A-5A)*50k*(feedback Resistor/50k) $03: If FS1 switch is 1, the current supply is cut off and the discharge is performed. The waveform is as below and the time constant is determined by internal resistor 50K and external Cap.
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
0V
Figure 17. Waveform at Pin 3 When FS1 Is Switched from 0 to 1 The waveform of servo output pin according to FS1 and FS2 switches is as below.
$00
02
03
02
03
02
03
00
Figure 18. Focus Search Waveform at Pin 48 by $02 and $03 FS4 is switch for on/off control of focus servo loop $00: Focus servo off $08: Focus servo on Tracking Control ($1X) This command is used for tracking loop gain control, break circuit and anti-shock on/off control. D7 0 D6 0 D5 0 D4 1 D3 Anti shock on/off D2 Break circuit on/off D1 TG2 D0 TG1 ISTAT Anti shock
TG2 and TG1 are internal switch for tracking gain set. Tracking mode ($2X) This command is used for tracking and sled servo on/off and jump for searching track. D7 0 D6 0 D5 1 D4 0 D3 D2 D1 D0 ISTAT TZC
Tracking control
Sled control
29
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
D3 0 0 1 1 D2 0 1 0 1 Tracking mode Tracking servo off servo on Forward jump Reverse jump D1 0 0 1 1 D0 0 1 0 1 Sled mode Sled servo off servo on Forward kick Reverse kick
Peak value set ($3X) This command is used for the peak value setting of focus search and sled kick. D0, D1: Sled kick D2, D3: Focus search peak value Auto Sequencer command ($4X) This command is used for reducing control time and replacing several command by one auto- sequence command. * * * Auto sequencer mode is performed from the first falling edge of WDCK clock after the falling of the latch pulse. Auto sequencer does not carry out tracking gain up, brake, anti-shock and focus gain down. MICOM checks ISTAT pin (/BUSY) and sends to $40 command to reset preceding auto sequencer status Hexa Cancel Auto focus 1 Track jump 10 Track jump 2N track jump M track move $40 $47 $48 $49 $4A $4B $4C $4D $4E $4F AS3 0 0 1 1 1 1 1 1 1 1 AS2 0 1 0 0 0 0 1 1 1 1 AS1 0 1 0 0 1 1 0 0 1 1 AS0 0 1 0 1 0 1 0 1 0 1 Remark Reset - Forward Reverse Forward Reverse Forward Reverse Forward Reverse
RAM Set ($5X -- $7X) The value of RAM set is somewhat different to the actual count and the initial value is like below Item Blind overflow, Brake Kick 2N, M Track jump $67 $7E Initial value $55 Actual Count Value Set value +4 -- 5 WDCK clock Set value +3 WDCK clock Set value +5 WDCK clock Set value +3 WDCK clock
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
AUTO ADJUSTMENT COMMAND
This command is used for auto control of offset, balance, gain adjustment and reference voltage setting. This command is also in control of on/off and sub type of laser diode and test or set mode. TRACKING BALANCE ($800 -- $81F) Item Tracking balance Hexa $800 -- $81F Data (5bits) D4 -- D0 Initial value $81F ISTAT (pin31) BAL TRCNT (pin30) TRCNT
TRACKING GAIN ($820 -- $83F) Item Tracking gain Hexa $820 -- $83F Data 5bits) D4 -- D0 Initial value $820 ISTAT (pin31) GAIN TRCNT (pin30) TGL
TRACKING BALANCE & GAIN WINDOW LEVEL SETTING Item window level setting Hexa $84X D3 gain D2 balance D1 0 D0 0 Initial value $840
NOTE: The tracking balance and gain window level is set by D2,D3 data and the value has two kinds of window levels set
TRACKING BALANCE WINDOW LEVEL D2 Data Tracking balance window level 0 -10 to +15 mV 1 -20 to +20 mV
TRACKING GAIN WINDOW LEVEL D3 Data Tracking gain window level 0 250 to 400 mV 1 150 to 300 mV
FOCUS LOOP OFFSET ADJUSTMENT START COMMAND ($841, $842) This command is used for adjusting focus error bias and removing focus servo offset. It is executed during laser diode off. Hexa command $841 $842 meaning Focus error bias adjustment start command Focus servo offset cancel adjustment start command
31
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
APC CIRCUIT OPERATION AND INTERRUPTION ON/OFF SETTING CONDITION ($85X) This command is used for setting of laser diode on/off, sub type (P_sub or N_sub) of laser diode and interruption countermeasure circuit on/off. Item APC & Interruption on/off condition Hexa $85X D3 LD on/off 0: On 1: Off D2 Sub-type 0: N_sub 1: P_sub D1 D0 Initial value $858
Interruption ON/OFF and time setting
Time setting for Interruption countermeasure circuit on/off D1 0 0 1 1 D0 0 1 0 1 Meaning Countermeasure circuit on for all mirror signal Countermeasure circuit on up to 20KHz mirror signal Countermeasure circuit off Countermeasure circuit on up to 10KHz mirror signal
FOCUS SERVO OFFSET RESET COMMAND AND SET MODE COMMAND (86X) This command is used for set and release before focus servo loop offset adjustment and mode change. Item Set mode & Focus servo offset reset command Hexa $86X D3 0: offset release 1: offset reset D2 option(Pin41 output) 0: Defect 1: SSTOP D1 1 D0 1
NOTES: 1. The set mode command is sent by MICOM right after tracking gain is tuned. 2. The ISTAT pin is outputted the internal status of $00 ~ $7X command.
DIRECT COMMAND (DIRC) AND FOCUS BIAS RESET COMMAND ($87X) This command is used for direct 1 track jump on/off setting and focus bias adjustment set and release Item DIRC & focus bias reset Hexa $87X D3 0: DIRC On 1:DIRC Off D2 0: reset 1: reset release D1 X D0 X
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RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
THE EXAMPLE OF ADJUSTMENT FREE ALGORITHM
FOCUS ERROR BIAS & SERVO OFFSET CANCEL ADJUSTMENT
Focus_RF_Offset Adjustment [Command:841]
Increment Count 5bit Counter 17mV/Bit Tuning range: + 260mV no
ISTAT Check L--> H yes Finish [RF CNT value Latch]
Time Max 100msec
Focus_Servo_Offset Adjustment [Command:842]
Increment Count 4bit Counter 40mV/Bit tuning range : + 280mV no ISTAT Check L--> H yes Finish [Servo value Latch]
Time Max 100msec
Figure 19. Focus Error Bias & Servo Offset Cancel Adjustment Flow Chart
33
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
TRACKING BALANCE ADJUSTMENT
Balance adjustment Range window setting + 20mv, + 15mv setting
$844
YES
ISTAT Check L--> H NO ISTAT Check L--> H NO
MICOM Balance 5Bit adjustment $800 ~ $81F Command Up
YES
Finish [RF CNT value Latch
Figure 20. Tracking Balance Adjustment Flow Chart TRACKING GAIN ADJUSTMENT
Gain adjustment range setting Command
$848
ISTAT Check L--> H YES
NO
5-bit Gain Adjustment $820 ~ $83F Command
Gain adjustment finish
TOC READ
Figure 21. Tracking Gain Adjustment Flow Chart
34
RF AMP & SERVO SIGNAL PROCESSOR
S1L9223B02
APPLICATION CIRCUIT
35
S1L9223B02
RF AMP & SERVO SIGNAL PROCESSOR
PACKATE DIMESTION
14.00 + 0.20 12.00 + 0.10 0-7
+ 0.073
0.127 - 0.037
14.00 + 0.20
12.00 + 0.10
80-TQFP-1212
0.08 MAX
#80
#1 0.50
+ 0.07
0.20 - 0.03 0.05MIN (1.25) 1.00 0.05 1.20 MAX
36
0.45 - 0.75

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